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https://www.gnu.org/software/make/manual/html_node/MAKE-Variable.html We should be using the $(MAKE) variable when calling the make command from Makefiles since we use Makefile recursion. Signed-off-by: Tyler Hicks <tyhicks@canonical.com>
8 lines
115 B
Makefile
8 lines
115 B
Makefile
SUBDIRS=regression stress
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.PHONY: clean
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clean:
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for dir in $(SUBDIRS) ; do \
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$(MAKE) clean -C $${dir} ; \
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done
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