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https://gitlab.isc.org/isc-projects/bind9
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add 'sync' to ISC_PLATFORM_USEMACASM build as well
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@@ -14,7 +14,7 @@
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* PERFORMANCE OF THIS SOFTWARE.
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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*/
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/* $Id: atomic.h,v 1.10 2011/03/07 23:47:37 tbox Exp $ */
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/* $Id: atomic.h,v 1.11 2011/03/08 00:52:42 marka Exp $ */
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#ifndef ISC_ATOMIC_H
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#ifndef ISC_ATOMIC_H
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#define ISC_ATOMIC_H 1
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#define ISC_ATOMIC_H 1
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@@ -110,7 +110,8 @@ isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
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"mr %0, r6\n"
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"mr %0, r6\n"
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"add r6, r6, %2\n"
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"add r6, r6, %2\n"
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"stwcx. r6, 0, %1\n"
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"stwcx. r6, 0, %1\n"
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"bne- 1b"
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"bne- 1b\n"
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"sync"
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#else
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#else
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"1:"
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"1:"
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"lwarx 6, 0, %1\n"
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"lwarx 6, 0, %1\n"
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@@ -136,7 +137,8 @@ isc_atomic_store(void *p, isc_int32_t val) {
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"lwarx r6, 0, %0\n"
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"lwarx r6, 0, %0\n"
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"lwz r6, %1\n"
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"lwz r6, %1\n"
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"stwcx. r6, 0, %0\n"
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"stwcx. r6, 0, %0\n"
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"bne- 1b"
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"bne- 1b\n"
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"sync"
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#else
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#else
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"1:"
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"1:"
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"lwarx 6, 0, %0\n"
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"lwarx 6, 0, %0\n"
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@@ -165,7 +167,8 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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"mr r6, %3\n"
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"mr r6, %3\n"
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"stwcx. r6, 0, %1\n"
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"stwcx. r6, 0, %1\n"
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"bne- 1b\n"
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"bne- 1b\n"
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"2:"
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"2:\n"
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"sync"
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#else
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#else
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"1:"
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"1:"
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"lwarx 6, 0, %1\n"
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"lwarx 6, 0, %1\n"
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