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mirror of https://gitlab.isc.org/isc-projects/bind9 synced 2025-08-30 22:15:20 +00:00

Use release memory ordering when incrementing reference counter

As the relaxed memory ordering doesn't ensure any memory
synchronization, it is possible that the increment will succeed even
in the case when it should not - there is a race between
atomic_fetch_sub(..., acq_rel) and atomic_fetch_add(..., relaxed).
Only the result is consistent, but the previous value for both calls
could be same when both calls are executed at the same time.
This commit is contained in:
Ondřej Surý
2024-09-09 16:03:53 +02:00
committed by Ondřej Surý
parent d7d1804f16
commit 88227ea665

View File

@@ -70,7 +70,7 @@ typedef atomic_uint_fast32_t isc_refcount_t;
#define isc_refcount_increment0(target) \
({ \
uint_fast32_t __v; \
__v = atomic_fetch_add_relaxed(target, 1); \
__v = atomic_fetch_add_release(target, 1); \
INSIST(__v < UINT32_MAX); \
__v; \
})
@@ -83,7 +83,7 @@ typedef atomic_uint_fast32_t isc_refcount_t;
#define isc_refcount_increment(target) \
({ \
uint_fast32_t __v; \
__v = atomic_fetch_add_relaxed(target, 1); \
__v = atomic_fetch_add_release(target, 1); \
INSIST(__v > 0 && __v < UINT32_MAX); \
__v; \
})