architecture dependent atomic operations (when
available), improving response performance on
multi-processor machines significantly.
x86, x86_64, alpha, and sparc64 are currently
supported.
(RT #13505)
incrementing the reference counter to the entry. Otherwise, the
entry could leak when dns_acache_setentry() fails. This must be
corrected in some way if not by this change. [RT #13339]
an internal cache framework for additional section
content to improve response performance. Several
configuration options were provided to control the
behavior.