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Code Issues Releases Wiki Activity

[v0.99] Fix a few typos

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Dr-Noob 2021-08-16 10:08:21 +02:00
parent 58160d1185
commit 3e01df28fc
4 changed files with 5 additions and 5 deletions
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2
README.md
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@ -116,6 +116,6 @@ See [cpufetch contributing guidelines](https://github.com/Dr-Noob/cpufetch/CONTR
# 7. Acknowledgements
Thanks to the fellow contributors and interested people in the project. Special thanks to:
- [Gonzalocl](https://github.com/Gonzalocl), [OdnetninI](https://github.com/OdnetninI): Tested cpufetch in the earlier versions of the project in many different CPUs.
- [Kingo](https://github.com/Kyngo): Tested cpufetch in the Apple M1 CPU.
- [Kyngo](https://github.com/Kyngo): Tested cpufetch in the Apple M1 CPU.
- [avollmerhaus](https://github.com/avollmerhaus): Gave me ssh acess to a PowerPC machine, allowing me to develop the PowerPC port.
- [bbonev](https://github.com/bbonev), [stephan-cr](https://github.com/stephan-cr): Reviewed the source code.

2
doc/DOCUMENTATION_ARM.md
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@ -11,7 +11,7 @@ Microarchitecture information is acquired from the Main ID Register (MIDR) [[2](
- `CPU part`
- `CPU revision`
The MIDR register can be built with this information. Another posible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1`
The MIDR register can be built with this information. Another possible approach is to read MIDR directly from `/sys/devices/system/cpu/cpu*/regs/identification/midr_el1`
With the MIDR available, the approach is the same as the one used in x86_64 architectures. cpufetch has a file that acts like a database that tries to match the MIDR register with the specific CPU microarchitecture.

2
src/arm/soc.c
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@ -370,7 +370,7 @@ bool match_qualcomm(char* soc_name, struct system_on_chip* soc) {
SOC_EQ(tmp, "MSM8625Q", "200", SOC_SNAPD_MSM8625Q, soc, 45)
SOC_EQ(tmp, "MSM8208", "208", SOC_SNAPD_MSM8208, soc, 28)
SOC_EQ(tmp, "MSM8905", "205", SOC_SNAPD_MSM8905, soc, 28)
SOC_EQ(tmp, "MSM8909", "210 / 212", SOC_SNAPD_MSM8909, soc, 28) // In the future, we can differenciate them using frequency
SOC_EQ(tmp, "MSM8909", "210 / 212", SOC_SNAPD_MSM8909, soc, 28) // In the future, we can differentiate them using frequency
SOC_EQ(tmp, "QM215", "215", SOC_SNAPD_QM215, soc, 28)
// Snapdragon 4XX //
SOC_EQ(tmp, "APQ8028", "400", SOC_SNAPD_APQ8028, soc, 28)

4
src/common/global.c
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@ -58,9 +58,9 @@ void printBug(const char *fmt, ...) {
va_end(args);
fprintf(stderr,RED "[ERROR]: "RESET "%s\n",buffer);
#if defined(ARCH_X86) || defined(ARCH_PPC)
fprintf(stderr,"Please, create a new issue with this error message and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
fprintf(stderr,"Please, create a new issue with this error message and the output of 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
#elif ARCH_ARM
fprintf(stderr,"Please, create a new issue with this error message, your smartphone/computer model and the output of 'cpufetch --debug' in https://github.com/Dr-Noob/cpufetch/issues\n");
fprintf(stderr,"Please, create a new issue with this error message, your smartphone/computer model and the output of 'cpufetch --debug' on https://github.com/Dr-Noob/cpufetch/issues\n");
#endif
}