mirror of
https://github.com/checkpoint-restore/criu
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a218fe0baa
Implement multi-threaded code to read and write contents of each GPU VRAM BOs in parallel in order to speed up dumping process when using multiple GPUs. Signed-off-by: David Yat Sin <david.yatsin@amd.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
130 lines
3.8 KiB
C
130 lines
3.8 KiB
C
#ifndef __KFD_PLUGIN_TOPOLOGY_H__
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#define __KFD_PLUGIN_TOPOLOGY_H__
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#define DRM_FIRST_RENDER_NODE 128
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#define DRM_LAST_RENDER_NODE 255
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#define TOPO_HEAP_TYPE_PUBLIC 1 /* HSA_HEAPTYPE_FRAME_BUFFER_PUBLIC */
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#define TOPO_HEAP_TYPE_PRIVATE 2 /* HSA_HEAPTYPE_FRAME_BUFFER_PRIVATE */
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#define TOPO_IOLINK_TYPE_ANY 0 /* HSA_IOLINKTYPE_UNDEFINED */
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#define TOPO_IOLINK_TYPE_PCIE 2 /* HSA_IOLINKTYPE_PCIEXPRESS */
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#define TOPO_IOLINK_TYPE_XGMI 11 /* HSA_IOLINK_TYPE_XGMI */
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#define NODE_IS_GPU(node) ((node)->gpu_id != 0)
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#define INVALID_CPU_ID 0xFFFF
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/*************************************** Structures ***********************************************/
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struct tp_node;
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struct tp_iolink {
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struct list_head listm;
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uint32_t type;
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uint32_t node_to_id;
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struct tp_node *node_to;
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struct tp_node *node_from;
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bool valid; /* Set to false if target node is not accessible */
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struct tp_iolink *peer; /* If link is bi-directional, peer link */
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};
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struct tp_node {
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uint32_t id;
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uint32_t gpu_id;
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uint32_t cpu_cores_count;
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uint32_t simd_count;
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uint32_t mem_banks_count;
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uint32_t caches_count;
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uint32_t io_links_count;
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uint32_t max_waves_per_simd;
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uint32_t lds_size_in_kb;
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uint32_t num_gws;
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uint32_t wave_front_size;
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uint32_t array_count;
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uint32_t simd_arrays_per_engine;
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uint32_t cu_per_simd_array;
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uint32_t simd_per_cu;
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uint32_t max_slots_scratch_cu;
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uint32_t vendor_id;
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uint32_t device_id;
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uint32_t domain;
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uint32_t drm_render_minor;
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uint64_t hive_id;
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uint32_t num_sdma_engines;
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uint32_t num_sdma_xgmi_engines;
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uint32_t num_sdma_queues_per_engine;
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uint32_t num_cp_queues;
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uint32_t fw_version;
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uint32_t capability;
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uint32_t sdma_fw_version;
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bool vram_public;
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uint64_t vram_size;
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struct list_head listm_system;
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struct list_head listm_p2pgroup;
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struct list_head listm_mapping; /* Used only during device mapping */
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uint32_t num_valid_iolinks;
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struct list_head iolinks;
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int drm_fd;
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};
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struct tp_p2pgroup {
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uint32_t type;
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uint32_t num_nodes;
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struct list_head listm_system;
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struct list_head nodes;
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};
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struct tp_system {
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bool parsed;
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uint32_t num_nodes;
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struct list_head nodes;
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uint32_t num_xgmi_groups;
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struct list_head xgmi_groups;
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};
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struct id_map {
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uint32_t src;
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uint32_t dest;
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struct list_head listm;
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};
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struct device_maps {
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struct list_head cpu_maps; /* CPUs are mapped using node_id */
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struct list_head gpu_maps;
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struct list_head *tail_cpu; /* GPUs are mapped using gpu_id */
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struct list_head *tail_gpu;
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};
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/**************************************** Functions ***********************************************/
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void topology_init(struct tp_system *sys);
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void topology_free(struct tp_system *topology);
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int topology_parse(struct tp_system *topology, const char *msg);
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int topology_determine_iolinks(struct tp_system *sys);
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void topology_print(const struct tp_system *sys, const char *msg);
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struct id_map *maps_add_gpu_entry(struct device_maps *maps, const uint32_t src_id, const uint32_t dest_id);
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struct tp_node *sys_add_node(struct tp_system *sys, uint32_t id, uint32_t gpu_id);
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struct tp_iolink *node_add_iolink(struct tp_node *node, uint32_t type, uint32_t node_to_id);
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struct tp_node *sys_get_node_by_gpu_id(const struct tp_system *sys, const uint32_t gpu_id);
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struct tp_node *sys_get_node_by_render_minor(const struct tp_system *sys, const int drm_render_minor);
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struct tp_node *sys_get_node_by_index(const struct tp_system *sys, uint32_t index);
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int node_get_drm_render_device(struct tp_node *node);
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void sys_close_drm_render_devices(struct tp_system *sys);
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int set_restore_gpu_maps(struct tp_system *tp_checkpoint, struct tp_system *tp_local, struct device_maps *maps);
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uint32_t maps_get_dest_gpu(const struct device_maps *maps, const uint32_t src_id);
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void maps_init(struct device_maps *maps);
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void maps_free(struct device_maps *maps);
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#endif /* __KFD_PLUGIN_TOPOLOGY_H__ */
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