mirror of
https://github.com/checkpoint-restore/criu
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This changes the license of all files in the images/ directory from GPLv2 to the Expat license (so-called MIT). According to git the files have been authored by: Abhishek Dubey Adrian Reber Alexander Mikhalitsyn Alice Frosi Andrei Vagin (Andrew Vagin, Andrey Vagin) Cyrill Gorcunov Dengguangxing Dmitry Safonov Guoyun Sun Kirill Tkhai Kir Kolyshkin Laurent Dufour Michael Holzheu Michał Cłapiński Mike Rapoport Nicolas Viennot Nikita Spiridonov Pavel Emelianov (Pavel Emelyanov) Pavel Tikhomirov Radostin Stoyanov rbruno@gsd.inesc-id.pt Sebastian Pipping Stanislav Kinsburskiy Tycho Andersen Valeriy Vdovin The Expat license (so-called MIT) can be found here: https://opensource.org/licenses/MIT According to that link the correct SPDX short identifier is 'MIT'. https://spdx.org/licenses/MIT.html Signed-off-by: Adrian Reber <areber@redhat.com>
111 lines
2.9 KiB
Protocol Buffer
111 lines
2.9 KiB
Protocol Buffer
// SPDX-License-Identifier: MIT
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syntax = "proto2";
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import "opts.proto";
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enum user_x86_regs_mode {
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NATIVE = 1;
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COMPAT = 2;
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}
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/* Reusing entry for both 64 and 32 bits register sets */
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message user_x86_regs_entry {
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required uint64 r15 = 1;
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required uint64 r14 = 2;
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required uint64 r13 = 3;
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required uint64 r12 = 4;
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required uint64 bp = 5;
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required uint64 bx = 6;
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required uint64 r11 = 7;
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required uint64 r10 = 8;
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required uint64 r9 = 9;
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required uint64 r8 = 10;
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required uint64 ax = 11;
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required uint64 cx = 12;
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required uint64 dx = 13;
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required uint64 si = 14;
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required uint64 di = 15;
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required uint64 orig_ax = 16;
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required uint64 ip = 17;
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required uint64 cs = 18;
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required uint64 flags = 19;
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required uint64 sp = 20;
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required uint64 ss = 21;
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required uint64 fs_base = 22;
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required uint64 gs_base = 23;
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required uint64 ds = 24;
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required uint64 es = 25;
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required uint64 fs = 26;
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required uint64 gs = 27;
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optional user_x86_regs_mode mode = 28 [default = NATIVE];
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}
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message user_x86_xsave_entry {
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/* standart xsave features */
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required uint64 xstate_bv = 1;
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/* AVX components: 16x 256-bit ymm registers, hi 128 bits */
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repeated uint32 ymmh_space = 2;
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/* MPX components */
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repeated uint64 bndreg_state = 3;
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repeated uint64 bndcsr_state = 4;
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/* AVX512 components: k0-k7, ZMM_Hi256, Hi16_ZMM */
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repeated uint64 opmask_reg = 5;
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repeated uint64 zmm_upper = 6;
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repeated uint64 hi16_zmm = 7;
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/* Protected keys */
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repeated uint32 pkru = 8;
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/*
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* Processor trace (PT) and hardware duty cycling (HDC)
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* are supervisor state components and only managed by
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* xsaves/xrstors on cpl=0, so ignore them.
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*/
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}
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message user_x86_fpregs_entry {
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/* fxsave data */
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required uint32 cwd = 1;
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required uint32 swd = 2;
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required uint32 twd = 3;
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required uint32 fop = 4;
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required uint64 rip = 5;
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required uint64 rdp = 6;
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required uint32 mxcsr = 7;
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required uint32 mxcsr_mask = 8;
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repeated uint32 st_space = 9;
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repeated uint32 xmm_space = 10;
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/* Unused, but present for backward compatibility */
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repeated uint32 padding = 11;
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/* xsave extension */
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optional user_x86_xsave_entry xsave = 13;
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}
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message user_desc_t {
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required uint32 entry_number = 1;
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/* this is for GDT, not for MSRs - 32-bit base */
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required uint32 base_addr = 2;
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required uint32 limit = 3;
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required bool seg_32bit = 4;
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required bool contents_h = 5;
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required bool contents_l = 6;
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required bool read_exec_only = 7 [default = true];
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required bool limit_in_pages = 8;
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required bool seg_not_present = 9 [default = true];
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required bool useable = 10;
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}
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message thread_info_x86 {
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required uint64 clear_tid_addr = 1[(criu).hex = true];
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required user_x86_regs_entry gpregs = 2[(criu).hex = true];
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required user_x86_fpregs_entry fpregs = 3;
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repeated user_desc_t tls = 4;
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}
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