Split the big @superio_ids list into per-family lists.

git-svn-id: http://lm-sensors.org/svn/lm-sensors/branches/lm-sensors-3.0.0@5462 7894878c-1315-0410-8ee3-d5d059ff63e0

prog/detect/sensors-detect

@@ -40,7 +40,7 @@ foreach ('/usr/sbin', '/usr/local/sbin', '/sbin') {
 
 use constant NO_CACHE => 1;
 use vars qw(@pci_adapters @chip_ids @non_hwmon_chip_ids $i2c_addresses_to_scan
-	    @superio_ids @cpu_ids $revision @i2c_byte_cache);
+	    @cpu_ids $revision @i2c_byte_cache);
 
 $revision = '$Revision$ ($Date$)';
 $revision =~ s/\$\w+: (.*?) \$/$1/g;
@@ -1142,26 +1142,10 @@ use vars qw(@i2c_adapter_names);
 #      I2C bus, a function which detects whether two entries are the same.
 #      The function will be passed three parameters: the LPC address, an
 #      open file descriptor to access the I2C bus, and the I2C address.
-#
+use vars qw(@superio_ids_natsemi @superio_ids_smsc @superio_ids_smsc_ns
-# Entries are grouped by family. Each family entry has the following fields:
+	    @superio_ids_winbond @superio_ids_ite @superio_ids);
-#  family: The family name
+
-#  guess (optional): Typical logical device address. This lets us do
+@superio_ids_natsemi = (
-#      generic probing if we fail to recognize the chip.
-#  enter: The password sequence to write to the address register
-#  chips: Array of chips
-# The order of families matters, because we stop as soon as one family
-# succeeds. So we have to list families with shorter password sequences
-# first.
-@superio_ids = (
-  {
-    family => "National Semiconductor",
-    enter =>
-    {
-      0x2e => [],
-      0x4e => [],
-    },
-    chips =>
-    [
       {
 	name => "Nat. Semi. PC8374L Super IO Sensors",
 	driver => "to-be-written",
@@ -1278,17 +1262,9 @@ use vars qw(@i2c_adapter_names);
 	devid => 0xf2,
 	logdev => 0x14,
       },
-    ],
+);
-  },
+
-  {
+@superio_ids_smsc = (
-    family => "SMSC",
-    enter =>
-    {
-      0x2e => [0x55],
-      0x4e => [0x55],
-    },
-    chips =>
-    [
       {
 	name => "SMSC DME1737 Super IO",
 	# Hardware monitoring features are accessed on the SMBus
@@ -1507,13 +1483,9 @@ use vars qw(@i2c_adapter_names);
 	driver => "not-a-sensor",
 	devid => 0x83,
       },
-    ],
+);
-    # Non-standard SMSC detection callback and chip list. These chips differ
+
-    # from the standard ones listed above in that the device ID register
+@superio_ids_smsc_ns = (
-    # address is 0x0d instead of 0x20 (as specified by the ISA PNP spec).
-    ns_detect => \&smsc_ns_detect_superio,
-    ns_chips =>
-    [
       {
 	name => "SMSC FDC37C665 Super IO",
 	driver => "not-a-sensor",
@@ -1539,18 +1511,9 @@ use vars qw(@i2c_adapter_names);
 	driver => "not-a-sensor",
 	devid => 0x5a,
       },
-    ],
+);
-  },
+
-  {
+@superio_ids_winbond = (
-    family => "VIA/Winbond/Fintek",
-    guess => 0x290,
-    enter =>
-    {
-      0x2e => [0x87, 0x87],
-      0x4e => [0x87, 0x87],
-    },
-    chips =>
-    [
       {
 	name => "VIA VT1211 Super IO Sensors",
 	driver => "vt1211",
@@ -1680,18 +1643,9 @@ use vars qw(@i2c_adapter_names);
 	driver => "not-a-sensor",
 	devid => 0x8708,
       },
-    ],
+);
-  },
+
-  {
+@superio_ids_ite = (
-    family => "ITE",
-    guess => 0x290,
-    enter =>
-    {
-      0x2e => [0x87, 0x01, 0x55, 0x55],
-      0x4e => [0x87, 0x01, 0x55, 0xaa],
-    },
-    chips =>
-    [
       {
 	name => "ITE IT8702F Super IO Sensors",
 	driver => "to-be-written",
@@ -1735,7 +1689,60 @@ use vars qw(@i2c_adapter_names);
 	devid => 0x8726,
 	logdev => 0x04,
       },
-    ],
+);
+
+# Entries are grouped by family. Each family entry has the following fields:
+#  family: The family name
+#  guess (optional): Typical logical device address. This lets us do
+#      generic probing if we fail to recognize the chip.
+#  enter: The password sequence to write to the address register
+#  chips: Array of chips
+# The order of families matters, because we stop as soon as one family
+# succeeds. So we have to list families with shorter password sequences
+# first.
+@superio_ids = (
+  {
+    family => "National Semiconductor",
+    enter =>
+    {
+      0x2e => [],
+      0x4e => [],
+    },
+    chips => \@superio_ids_natsemi,
+  },
+  {
+    family => "SMSC",
+    enter =>
+    {
+      0x2e => [0x55],
+      0x4e => [0x55],
+    },
+    chips => \@superio_ids_smsc,
+    # Non-standard SMSC detection callback and chip list. These chips differ
+    # from the standard ones listed above in that the device ID register
+    # address is 0x0d instead of 0x20 (as specified by the ISA PNP spec).
+    ns_detect => \&smsc_ns_detect_superio,
+    ns_chips => \@superio_ids_smsc_ns,
+  },
+  {
+    family => "VIA/Winbond/Fintek",
+    guess => 0x290,
+    enter =>
+    {
+      0x2e => [0x87, 0x87],
+      0x4e => [0x87, 0x87],
+    },
+    chips => \@superio_ids_winbond,
+  },
+  {
+    family => "ITE",
+    guess => 0x290,
+    enter =>
+    {
+      0x2e => [0x87, 0x01, 0x55, 0x55],
+      0x4e => [0x87, 0x01, 0x55, 0xaa],
+    },
+    chips => \@superio_ids_ite,
   },
 );