mirror of
https://github.com/lm-sensors/lm-sensors
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other places. git-svn-id: http://lm-sensors.org/svn/lm-sensors/trunk@645 7894878c-1315-0410-8ee3-d5d059ff63e0
640 lines
18 KiB
C
640 lines
18 KiB
C
/*
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i801.c - Part of lm_sensors, Linux kernel modules for hardware
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monitoring
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Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
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Philip Edelbrock <phil@netroedge.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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This driver supports the Intel 82801AA and 82801AB
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I/O Controller Hubs (ICH). They are similar to the PIIX4 and are part
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of Intel's '810' chipset. See the doc/busses/i2c-i801 file for details.
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*/
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/* Note: we assume there can only be one I801, with one SMBus interface */
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/i2c.h>
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#include "version.h"
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#include "compat.h"
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#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,1,54))
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#include <linux/bios32.h>
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#endif
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/* I801 SMBus address offsets */
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#define SMBHSTSTS (0 + i801_smba)
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#define SMBHSTCNT (2 + i801_smba)
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#define SMBHSTCMD (3 + i801_smba)
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#define SMBHSTADD (4 + i801_smba)
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#define SMBHSTDAT0 (5 + i801_smba)
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#define SMBHSTDAT1 (6 + i801_smba)
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#define SMBBLKDAT (7 + i801_smba)
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/* PCI Address Constants */
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#define SMBBA 0x020
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#define SMBHSTCFG 0x040
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#define SMBREV 0x008
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/* Other settings */
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#define MAX_TIMEOUT 500
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#define ENABLE_INT9 0
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/* I801 command constants */
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#define I801_QUICK 0x00
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#define I801_BYTE 0x04
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#define I801_BYTE_DATA 0x08
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#define I801_WORD_DATA 0x0C
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#define I801_BLOCK_DATA 0x14
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#define I801_I2C_BLOCK_DATA 0x18 /* unimplemented */
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#define I801_BLOCK_LAST 0x34
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#define I801_I2C_BLOCK_LAST 0x38 /* unimplemented */
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/* insmod parameters */
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/* If force is set to anything different from 0, we forcibly enable the
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I801. DANGEROUS! */
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static int force = 0;
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MODULE_PARM(force,"i");
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MODULE_PARM_DESC(force,"Forcibly enable the I801. DANGEROUS!");
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/* If force_addr is set to anything different from 0, we forcibly enable
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the I801 at the given address. VERY DANGEROUS! */
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static int force_addr = 0;
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MODULE_PARM(force_addr,"i");
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MODULE_PARM_DESC(force_addr,"Forcibly enable the I801 at the given address. "
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"EXTREMELY DANGEROUS!");
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static int __init i801_cleanup(void);
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static int i801_setup(void);
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static s32 i801_access(struct i2c_adapter *adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data * data);
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static void i801_do_pause( unsigned int amount );
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static int i801_transaction(void);
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static int i801_block_transaction(union i2c_smbus_data *data, char read_write);
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static void i801_inc(struct i2c_adapter *adapter);
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static void i801_dec(struct i2c_adapter *adapter);
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static u32 i801_func(struct i2c_adapter *adapter);
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#ifdef MODULE
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extern int init_module(void);
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extern int cleanup_module(void);
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#endif /* MODULE */
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static struct i2c_algorithm smbus_algorithm = {
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/* name */ "Non-I2C SMBus adapter",
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/* id */ I2C_ALGO_SMBUS,
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/* master_xfer */ NULL,
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/* smbus_access */ i801_access,
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/* slave_send */ NULL,
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/* slave_rcv */ NULL,
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/* algo_control */ NULL,
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/* functionality */ i801_func,
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};
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static struct i2c_adapter i801_adapter = {
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"unset",
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I2C_ALGO_SMBUS | I2C_HW_SMBUS_I801,
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&smbus_algorithm,
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NULL,
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i801_inc,
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i801_dec,
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NULL,
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NULL,
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};
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static int __initdata i801_initialized;
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static unsigned short i801_smba = 0;
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/* Detect whether a I801 can be found, and initialize it, where necessary.
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Note the differences between kernels with the old PCI BIOS interface and
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newer kernels with the real PCI interface. In compat.h some things are
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defined to make the transition easier. */
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int i801_setup(void)
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{
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int error_return=0;
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unsigned char temp;
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,54))
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struct pci_dev *I801_dev;
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#else
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unsigned char I801_bus, I801_devfn;
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int i,res;
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#endif
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/* First check whether we can access PCI at all */
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if (pci_present() == 0) {
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printk("i2c-i801.o: Error: No PCI-bus found!\n");
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error_return=-ENODEV;
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goto END;
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}
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/* Look for the I801, function 3 */
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/* Have to check for both the 82801AA and 82801AB */
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,54))
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/* Note: we keep on searching until we have found 'function 3' */
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I801_dev = NULL;
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do
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I801_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801AA_3, I801_dev);
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while(I801_dev && (PCI_FUNC(I801_dev->devfn) != 3));
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if(I801_dev == NULL) {
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do
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I801_dev = pci_find_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801AB_3, I801_dev);
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while(I801_dev && (PCI_FUNC(I801_dev->devfn) != 3));
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}
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if(I801_dev == NULL) {
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#else /* LINUX_VERSION_CODE < KERNEL_VERSION(2,1,54) */
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for (i = 0;
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! (res = pcibios_find_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801AA_3,
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i,&I801_bus, &I801_devfn)) &&
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PCI_FUNC(I801_devfn) != 3;
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i++);
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if (res) {
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for (i = 0;
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! (res = pcibios_find_device(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801AB_3,
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i,&I801_bus, &I801_devfn)) &&
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PCI_FUNC(I801_devfn) != 3;
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i++);
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}
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if (res) {
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#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,54) */
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printk("i2c-i801.o: Error: Can't detect I801, function 3!\n");
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error_return=-ENODEV;
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goto END;
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}
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/* Determine the address of the SMBus areas */
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if (force_addr) {
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i801_smba = force_addr & 0xfff0;
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force = 0;
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} else {
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pci_read_config_word_united(I801_dev, I801_bus ,I801_devfn,
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SMBBA,&i801_smba);
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i801_smba &= 0xfff0;
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}
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if (check_region(i801_smba, 8)) {
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printk("i2c-i801.o: I801_smb region 0x%x already in use!\n", i801_smba);
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error_return=-ENODEV;
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goto END;
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}
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pci_read_config_byte_united(I801_dev, I801_bus, I801_devfn,
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SMBHSTCFG, &temp);
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/* If force_addr is set, we program the new address here. Just to make
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sure, we disable the I801 first. */
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if (force_addr) {
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pci_write_config_byte_united(I801_dev, I801_bus, I801_devfn,
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SMBHSTCFG, temp & 0xfe);
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pci_write_config_word_united(I801_dev, I801_bus ,I801_devfn,
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SMBBA,i801_smba);
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pci_write_config_byte_united(I801_dev, I801_bus, I801_devfn,
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SMBHSTCFG, temp | 0x01);
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printk("i2c-i801.o: WARNING: I801 SMBus interface set to new "
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"address %04x!\n",i801_smba);
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} else if ((temp & 1) == 0) {
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if (force) {
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/* This should never need to be done, but has been noted that
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many Dell machines have the SMBus interface on the PIIX4
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disabled!? NOTE: This assumes I/O space and other allocations WERE
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done by the Bios! Don't complain if your hardware does weird
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things after enabling this. :') Check for Bios updates before
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resorting to this. */
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pci_write_config_byte_united(I801_dev, I801_bus, I801_devfn,
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SMBHSTCFG, temp | 1);
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printk("i2c-i801.o: WARNING: I801 SMBus interface has been FORCEFULLY "
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"ENABLED!\n");
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} else {
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printk("SMBUS: Error: Host SMBus controller not enabled!\n");
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error_return=-ENODEV;
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goto END;
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}
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}
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/* note: we assumed that the BIOS picked SMBus or I2C Bus timing
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appropriately (bit 2 in SMBHSTCFG) */
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/* Everything is happy, let's grab the memory and set things up. */
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request_region(i801_smba, 8, "i801-smbus");
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#ifdef DEBUG
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if (temp & 0x02)
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printk("i2c-i801.o: I801 using Interrupt SMI# for SMBus.\n");
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else
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printk("i2c-i801.o: I801 using PCI Interrupt for SMBus.\n");
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pci_read_config_byte_united(I801_dev, I801_bus, I801_devfn, SMBREV,
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&temp);
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printk("i2c-i801.o: SMBREV = 0x%X\n",temp);
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printk("i2c-i801.o: I801_smba = 0x%X\n",i801_smba);
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#endif /* DEBUG */
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END:
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return error_return;
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}
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/* Internally used pause function */
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void i801_do_pause( unsigned int amount )
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{
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current->state = TASK_INTERRUPTIBLE;
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schedule_timeout(amount);
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}
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/* Another internally used function */
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int i801_transaction(void)
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{
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int temp;
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int result=0;
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int timeout=0;
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#ifdef DEBUG
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printk("i2c-i801.o: Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, "
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"DAT1=%02x\n",
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inb_p(SMBHSTCNT),inb_p(SMBHSTCMD),inb_p(SMBHSTADD),inb_p(SMBHSTDAT0),
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inb_p(SMBHSTDAT1));
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#endif
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/* Make sure the SMBus host is ready to start transmitting */
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/* 0x1f = Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
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if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) {
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#ifdef DEBUG
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printk("i2c-i801.o: SMBus busy (%02x). Resetting... \n",temp);
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#endif
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outb_p(temp, SMBHSTSTS);
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if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
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#ifdef DEBUG
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printk("i2c-i801.o: Failed! (%02x)\n",temp);
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#endif
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return -1;
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} else {
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#ifdef DEBUG
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printk("i2c-i801.o: Successfull!\n");
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#endif
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}
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}
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/* start the transaction by setting bit 6 */
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outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
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/* We will always wait for a fraction of a second! */
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do {
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i801_do_pause(1);
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temp=inb_p(SMBHSTSTS);
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} while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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#ifdef DEBUG
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printk("i2c-i801.o: SMBus Timeout!\n");
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result = -1;
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#endif
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}
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if (temp & 0x10) {
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result = -1;
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#ifdef DEBUG
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printk("i2c-i801.o: Error: Failed bus transaction\n");
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#endif
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}
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if (temp & 0x08) {
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result = -1;
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printk("i2c-i801.o: Bus collision! SMBus may be locked until next hard
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reset. (sorry!)\n");
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/* Clock stops and slave is stuck in mid-transmission */
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}
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if (temp & 0x04) {
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result = -1;
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#ifdef DEBUG
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printk("i2c-i801.o: Error: no response!\n");
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#endif
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}
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if ((inb_p(SMBHSTSTS) & 0x1f) != 0x00)
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outb_p( inb(SMBHSTSTS), SMBHSTSTS);
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if ((temp = (0x1f & inb_p(SMBHSTSTS))) != 0x00) {
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#ifdef DEBUG
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printk("i2c-i801.o: Failed reset at end of transaction (%02x)\n",temp);
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#endif
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}
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#ifdef DEBUG
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printk("i2c-i801.o: Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, "
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"DAT0=%02x, DAT1=%02x\n",
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inb_p(SMBHSTCNT),inb_p(SMBHSTCMD),inb_p(SMBHSTADD),inb_p(SMBHSTDAT0),
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inb_p(SMBHSTDAT1));
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#endif
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return result;
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}
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/* All-inclusive block transaction function */
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int i801_block_transaction(union i2c_smbus_data *data, char read_write)
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{
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int i, len;
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int smbcmd;
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int temp;
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int result=0;
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int timeout=0;
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if (read_write == I2C_SMBUS_WRITE) {
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len = data->block[0];
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if (len < 1)
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len = 1;
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if (len > 32)
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len = 32;
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outb_p(len,SMBHSTDAT0);
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outb_p(data->block[1],SMBBLKDAT);
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} else {
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len = 32; /* max for reads */
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}
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for(i = 1; i <= len; i++)
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{
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if(i == len && read_write == I2C_SMBUS_READ)
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smbcmd = I801_BLOCK_LAST;
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else
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smbcmd = I801_BLOCK_DATA;
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(data->block[i],SMBBLKDAT);
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outb_p((smbcmd & 0x3C) + (ENABLE_INT9 & 1), SMBHSTCNT);
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#ifdef DEBUG
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printk("i2c-i801.o: Transaction (pre): CNT=%02x, CMD=%02x, ADD=%02x, "
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"DAT0=%02x, DAT1=%02x\n",
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inb_p(SMBHSTCNT),inb_p(SMBHSTCMD),inb_p(SMBHSTADD),inb_p(SMBHSTDAT0),
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inb_p(SMBHSTDAT1));
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#endif
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/* Make sure the SMBus host is ready to start transmitting */
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/* 0x1f = Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
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/* 0x9e = Byte_Done, Failed, Bus_Err, Dev_Err, Intr */
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temp = inb_p(SMBHSTSTS);
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if (((i == 1) && ((temp & 0x1f) != 0x00)) ||
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((i != 1) && ((temp & 0x9e) != 0x00)))
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{
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#ifdef DEBUG
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printk("i2c-i801.o: SMBus busy (%02x). Resetting... \n",temp);
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#endif
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outb_p(temp, SMBHSTSTS);
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if (((temp = inb_p(SMBHSTSTS)) & 0x9f) != 0x00)
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{
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printk("i2c-i801.o: Reset failed! (%02x)\n",temp);
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return -1;
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}
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if(i != 1)
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return -1; /* if die in middle of block transaction, fail */
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}
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/* start the transaction by setting bit 6 */
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outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
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/* We will always wait for a fraction of a second! */
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do {
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i801_do_pause(1);
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temp=inb_p(SMBHSTSTS);
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} while ((((i >= len) && (temp & 0x01)) || ((i < len) && (temp & 0x80)))
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&& (timeout++ < MAX_TIMEOUT));
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/* If the SMBus is still busy, we give up */
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if (timeout >= MAX_TIMEOUT) {
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result = -1;
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#ifdef DEBUG
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printk("i2c-i801.o: SMBus Timeout!\n");
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#endif
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}
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if (temp & 0x10) {
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result = -1;
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#ifdef DEBUG
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printk("i2c-i801.o: Error: Failed bus transaction\n");
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#endif
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} else if (temp & 0x08) {
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result = -1;
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printk("i2c-i801.o: Bus collision! SMBus may be locked until next hard"
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" reset. (sorry!)\n");
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/* Clock stops and slave is stuck in mid-transmission */
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} else if (temp & 0x04) {
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result = -1;
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#ifdef DEBUG
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printk("i2c-i801.o: Error: no response!\n");
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#endif
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} else if (temp & 0x80) {
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result = -1;
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#ifdef DEBUG
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printk("i2c-i801.o: Error: Failed in middle of block!\n");
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#endif
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}
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if ((temp & 0x9f) != 0x00)
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outb_p(temp, SMBHSTSTS);
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if ((temp = (0x9f & inb_p(SMBHSTSTS))) != 0x00) {
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#ifdef DEBUG
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printk("i2c-i801.o: Failed reset at end of transaction (%02x)\n",temp);
|
|
#endif
|
|
}
|
|
#ifdef DEBUG
|
|
printk("i2c-i801.o: Transaction (post): CNT=%02x, CMD=%02x, ADD=%02x, "
|
|
"DAT0=%02x, DAT1=%02x\n",
|
|
inb_p(SMBHSTCNT),inb_p(SMBHSTCMD),inb_p(SMBHSTADD),inb_p(SMBHSTDAT0),
|
|
inb_p(SMBHSTDAT1));
|
|
#endif
|
|
|
|
if (i == 1 && read_write == I2C_SMBUS_READ) {
|
|
len = inb_p(SMBHSTDAT0);
|
|
if (len < 1)
|
|
len = 1;
|
|
if (len > 32)
|
|
len = 32;
|
|
data->block[0] = len;
|
|
}
|
|
if (read_write == I2C_SMBUS_READ)
|
|
data->block[i] = inb_p(SMBBLKDAT);
|
|
|
|
if(result < 0)
|
|
return(result);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/* Return -1 on error. See smbus.h for more information */
|
|
s32 i801_access(struct i2c_adapter *adap, u16 addr, unsigned short flags,
|
|
char read_write, u8 command, int size,
|
|
union i2c_smbus_data * data)
|
|
{
|
|
|
|
switch(size) {
|
|
case I2C_SMBUS_PROC_CALL:
|
|
printk("i2c-i801.o: I2C_SMBUS_PROC_CALL not supported!\n");
|
|
return -1;
|
|
case I2C_SMBUS_QUICK:
|
|
outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD);
|
|
size = I801_QUICK;
|
|
break;
|
|
case I2C_SMBUS_BYTE:
|
|
outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD);
|
|
if (read_write == I2C_SMBUS_WRITE)
|
|
outb_p(command, SMBHSTCMD);
|
|
size = I801_BYTE;
|
|
break;
|
|
case I2C_SMBUS_BYTE_DATA:
|
|
outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD);
|
|
outb_p(command, SMBHSTCMD);
|
|
if (read_write == I2C_SMBUS_WRITE)
|
|
outb_p(data->byte,SMBHSTDAT0);
|
|
size = I801_BYTE_DATA;
|
|
break;
|
|
case I2C_SMBUS_WORD_DATA:
|
|
outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD);
|
|
outb_p(command, SMBHSTCMD);
|
|
if (read_write == I2C_SMBUS_WRITE) {
|
|
outb_p(data->word & 0xff,SMBHSTDAT0);
|
|
outb_p((data->word & 0xff00) >> 8,SMBHSTDAT1);
|
|
}
|
|
size = I801_WORD_DATA;
|
|
break;
|
|
case I2C_SMBUS_BLOCK_DATA:
|
|
outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), SMBHSTADD);
|
|
outb_p(command, SMBHSTCMD);
|
|
/* Block transactions are very different from piix4 block
|
|
and from the other i801 transactions. Handle in the
|
|
i801_block_transaction() routine. */
|
|
return(i801_block_transaction(data, read_write));
|
|
}
|
|
|
|
/* 'size' is really the transaction type */
|
|
outb_p((size & 0x3C) + (ENABLE_INT9 & 1), SMBHSTCNT);
|
|
|
|
if (i801_transaction()) /* Error in transaction */
|
|
return -1;
|
|
|
|
if ((read_write == I2C_SMBUS_WRITE) || (size == I801_QUICK))
|
|
return 0;
|
|
|
|
|
|
switch(size) {
|
|
case I801_BYTE: /* Result put in SMBHSTDAT0 */
|
|
data->byte = inb_p(SMBHSTDAT0);
|
|
break;
|
|
case I801_BYTE_DATA:
|
|
data->byte = inb_p(SMBHSTDAT0);
|
|
break;
|
|
case I801_WORD_DATA:
|
|
data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void i801_inc(struct i2c_adapter *adapter)
|
|
{
|
|
MOD_INC_USE_COUNT;
|
|
}
|
|
|
|
void i801_dec(struct i2c_adapter *adapter)
|
|
{
|
|
MOD_DEC_USE_COUNT;
|
|
}
|
|
|
|
u32 i801_func(struct i2c_adapter *adapter)
|
|
{
|
|
return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
|
|
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
|
|
I2C_FUNC_SMBUS_BLOCK_DATA;
|
|
}
|
|
|
|
int __init i2c_i801_init(void)
|
|
{
|
|
int res;
|
|
printk("i801.o version %s (%s)\n",LM_VERSION,LM_DATE);
|
|
#ifdef DEBUG
|
|
/* PE- It might be good to make this a permanent part of the code! */
|
|
if (i801_initialized) {
|
|
printk("i2c-i801.o: Oops, i801_init called a second time!\n");
|
|
return -EBUSY;
|
|
}
|
|
#endif
|
|
i801_initialized = 0;
|
|
if ((res = i801_setup())) {
|
|
printk("i2c-i801.o: I801 not detected, module not inserted.\n");
|
|
i801_cleanup();
|
|
return res;
|
|
}
|
|
i801_initialized ++;
|
|
sprintf(i801_adapter.name,"SMBus I801 adapter at %04x",i801_smba);
|
|
if ((res = i2c_add_adapter(&i801_adapter))) {
|
|
printk("i2c-i801.o: Adapter registration failed, module not inserted.\n");
|
|
i801_cleanup();
|
|
return res;
|
|
}
|
|
i801_initialized++;
|
|
printk("i2c-i801.o: I801 bus detected and initialized\n");
|
|
return 0;
|
|
}
|
|
|
|
int __init i801_cleanup(void)
|
|
{
|
|
int res;
|
|
if (i801_initialized >= 2)
|
|
{
|
|
if ((res = i2c_del_adapter(&i801_adapter))) {
|
|
printk("i2c-i801.o: i2c_del_adapter failed, module not removed\n");
|
|
return res;
|
|
} else
|
|
i801_initialized--;
|
|
}
|
|
if (i801_initialized >= 1) {
|
|
release_region(i801_smba, 8);
|
|
i801_initialized--;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
EXPORT_NO_SYMBOLS;
|
|
|
|
#ifdef MODULE
|
|
|
|
MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker <mds@eng.paradyne.com>");
|
|
MODULE_DESCRIPTION("I801 SMBus driver");
|
|
|
|
int init_module(void)
|
|
{
|
|
return i2c_i801_init();
|
|
}
|
|
|
|
int cleanup_module(void)
|
|
{
|
|
return i801_cleanup();
|
|
}
|
|
|
|
#endif /* MODULE */
|
|
|