From ced93443b71ff5259555c5a4f80f8664e41797f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20M=C3=B6ller?= Date: Sun, 1 Mar 2020 21:42:09 +0100 Subject: [PATCH] Added support for Intel CPUs with Comet Lake (06_A6H) microarchitecture. --- Hardware/CPU/IntelCPU.cs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Hardware/CPU/IntelCPU.cs b/Hardware/CPU/IntelCPU.cs index 1852490..ba73188 100644 --- a/Hardware/CPU/IntelCPU.cs +++ b/Hardware/CPU/IntelCPU.cs @@ -33,6 +33,7 @@ namespace OpenHardwareMonitor.Hardware.CPU { GoldmontPlus, CannonLake, IceLake, + CometLake, Tremont, TigerLake } @@ -209,6 +210,10 @@ namespace OpenHardwareMonitor.Hardware.CPU { microarchitecture = Microarchitecture.IceLake; tjMax = GetTjMaxFromMSR(); break; + case 0xA6: // Intel Core i3, i5, i7 10xxxU (14nm) + microarchitecture = Microarchitecture.CometLake; + tjMax = GetTjMaxFromMSR(); + break; case 0x86: // Intel Atom processors microarchitecture = Microarchitecture.Tremont; tjMax = GetTjMaxFromMSR(); @@ -271,6 +276,7 @@ namespace OpenHardwareMonitor.Hardware.CPU { case Microarchitecture.GoldmontPlus: case Microarchitecture.CannonLake: case Microarchitecture.IceLake: + case Microarchitecture.CometLake: case Microarchitecture.Tremont: case Microarchitecture.TigerLake: { uint eax, edx; @@ -341,6 +347,7 @@ namespace OpenHardwareMonitor.Hardware.CPU { microarchitecture == Microarchitecture.GoldmontPlus || microarchitecture == Microarchitecture.CannonLake || microarchitecture == Microarchitecture.IceLake || + microarchitecture == Microarchitecture.CometLake || microarchitecture == Microarchitecture.Tremont || microarchitecture == Microarchitecture.TigerLake) { @@ -465,6 +472,7 @@ namespace OpenHardwareMonitor.Hardware.CPU { case Microarchitecture.GoldmontPlus: case Microarchitecture.CannonLake: case Microarchitecture.IceLake: + case Microarchitecture.CometLake: case Microarchitecture.Tremont: case Microarchitecture.TigerLake: { uint multiplier = (eax >> 8) & 0xff;