mirror of
https://github.com/openhardwaremonitor/openhardwaremonitor
synced 2025-08-22 09:57:20 +00:00
548 lines
17 KiB
C#
548 lines
17 KiB
C#
/*
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This Source Code Form is subject to the terms of the Mozilla Public
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License, v. 2.0. If a copy of the MPL was not distributed with this
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file, You can obtain one at http://mozilla.org/MPL/2.0/.
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Copyright (C) 2009-2020 Michael Möller <mmoeller@openhardwaremonitor.org>
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*/
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using System;
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using System.Collections.Generic;
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using System.Globalization;
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using System.Text;
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using System.Threading;
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namespace OpenHardwareMonitor.Hardware.LPC {
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internal class LPCIO {
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private readonly List<ISuperIO> superIOs = new List<ISuperIO>();
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private readonly StringBuilder report = new StringBuilder();
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// I/O Ports
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private readonly ushort[] REGISTER_PORTS = new ushort[] { 0x2E, 0x4E };
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private readonly ushort[] VALUE_PORTS = new ushort[] { 0x2F, 0x4F };
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// Registers
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private const byte CHIP_ID_REGISTER = 0x20;
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private const byte CHIP_REVISION_REGISTER = 0x21;
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private const byte BASE_ADDRESS_REGISTER = 0x60;
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private void ReportUnknownChip(LPCPort port, string type, int chip) {
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report.Append("Chip ID: Unknown ");
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report.Append(type);
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report.Append(" with ID 0x");
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report.Append(chip.ToString("X", CultureInfo.InvariantCulture));
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report.Append(" at 0x");
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report.Append(port.RegisterPort.ToString("X",
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CultureInfo.InvariantCulture));
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report.Append("/0x");
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report.AppendLine(port.ValuePort.ToString("X",
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CultureInfo.InvariantCulture));
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report.AppendLine();
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}
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#region Winbond, Nuvoton, Fintek
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private const byte FINTEK_VENDOR_ID_REGISTER = 0x23;
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private const ushort FINTEK_VENDOR_ID = 0x1934;
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private const byte WINBOND_NUVOTON_HARDWARE_MONITOR_LDN = 0x0B;
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private const byte F71858_HARDWARE_MONITOR_LDN = 0x02;
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private const byte FINTEK_HARDWARE_MONITOR_LDN = 0x04;
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private bool DetectWinbondFintek(LPCPort port) {
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port.WinbondNuvotonFintekEnter();
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byte logicalDeviceNumber = 0;
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byte id = port.ReadByte(CHIP_ID_REGISTER);
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byte revision = port.ReadByte(CHIP_REVISION_REGISTER);
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Chip chip = Chip.Unknown;
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switch (id) {
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case 0x05:
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switch (revision) {
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case 0x07:
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chip = Chip.F71858;
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logicalDeviceNumber = F71858_HARDWARE_MONITOR_LDN;
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break;
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case 0x41:
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chip = Chip.F71882;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x06:
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switch (revision) {
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case 0x01:
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chip = Chip.F71862;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x07:
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switch (revision) {
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case 0x23:
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chip = Chip.F71889F;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x08:
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switch (revision) {
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case 0x14:
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chip = Chip.F71869;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x09:
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switch (revision) {
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case 0x01:
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chip = Chip.F71808E;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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case 0x09:
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chip = Chip.F71889ED;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x10:
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switch (revision) {
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case 0x05:
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chip = Chip.F71889AD;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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case 0x07:
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chip = Chip.F71869A;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x11:
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switch (revision) {
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case 0x06:
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chip = Chip.F71878AD;
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logicalDeviceNumber = FINTEK_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x52:
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switch (revision) {
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case 0x17:
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case 0x3A:
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case 0x41:
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chip = Chip.W83627HF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x82:
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switch (revision & 0xF0) {
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case 0x80:
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chip = Chip.W83627THF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x85:
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switch (revision) {
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case 0x41:
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chip = Chip.W83687THF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0x88:
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switch (revision & 0xF0) {
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case 0x50:
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case 0x60:
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chip = Chip.W83627EHF;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xA0:
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switch (revision & 0xF0) {
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case 0x20:
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chip = Chip.W83627DHG;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xA5:
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switch (revision & 0xF0) {
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case 0x10:
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chip = Chip.W83667HG;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xB0:
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switch (revision & 0xF0) {
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case 0x70:
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chip = Chip.W83627DHGP;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xB3:
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switch (revision & 0xF0) {
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case 0x50:
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chip = Chip.W83667HGB;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xB4:
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switch (revision & 0xF0) {
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case 0x70:
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chip = Chip.NCT6771F;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xC3:
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switch (revision & 0xF0) {
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case 0x30:
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chip = Chip.NCT6776F;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xC4:
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switch (revision & 0xF0) {
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case 0x50:
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chip = Chip.NCT610X;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xC5:
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switch (revision & 0xF0) {
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case 0x60:
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chip = Chip.NCT6779D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xC8:
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switch (revision) {
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case 0x03:
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chip = Chip.NCT6791D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xC9:
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switch (revision) {
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case 0x11:
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chip = Chip.NCT6792D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x13:
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chip = Chip.NCT6792DA;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xD1:
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switch (revision) {
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case 0x21:
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chip = Chip.NCT6793D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xD3:
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switch (revision) {
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case 0x52:
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chip = Chip.NCT6795D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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case 0xD4:
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switch (revision) {
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case 0x23:
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chip = Chip.NCT6796D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x2A:
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chip = Chip.NCT6796DR;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x2B:
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chip = Chip.NCT6798D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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case 0x51:
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chip = Chip.NCT6797D;
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logicalDeviceNumber = WINBOND_NUVOTON_HARDWARE_MONITOR_LDN;
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break;
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} break;
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}
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if (chip == Chip.Unknown) {
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if (id != 0 && id != 0xff) {
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port.WinbondNuvotonFintekExit();
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ReportUnknownChip(port, "Winbond / Nuvoton / Fintek",
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((id << 8) | revision));
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}
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} else {
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port.Select(logicalDeviceNumber);
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ushort address = port.ReadWord(BASE_ADDRESS_REGISTER);
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Thread.Sleep(1);
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ushort verify = port.ReadWord(BASE_ADDRESS_REGISTER);
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ushort vendorID = port.ReadWord(FINTEK_VENDOR_ID_REGISTER);
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// disable the hardware monitor i/o space lock on NCT679XD chips
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if (address == verify && (
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chip == Chip.NCT6791D ||
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chip == Chip.NCT6792D ||
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chip == Chip.NCT6792DA ||
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chip == Chip.NCT6793D ||
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chip == Chip.NCT6795D ||
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chip == Chip.NCT6796D ||
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chip == Chip.NCT6796DR ||
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chip == Chip.NCT6797D ||
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chip == Chip.NCT6798D))
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{
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port.NuvotonDisableIOSpaceLock();
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}
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port.WinbondNuvotonFintekExit();
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if (address != verify) {
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report.Append("Chip ID: 0x");
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report.AppendLine(chip.ToString("X"));
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report.Append("Chip revision: 0x");
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report.AppendLine(revision.ToString("X",
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CultureInfo.InvariantCulture));
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report.AppendLine("Error: Address verification failed");
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report.AppendLine();
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return false;
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}
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// some Fintek chips have address register offset 0x05 added already
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if ((address & 0x07) == 0x05)
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address &= 0xFFF8;
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if (address < 0x100 || (address & 0xF007) != 0) {
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report.Append("Chip ID: 0x");
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report.AppendLine(chip.ToString("X"));
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report.Append("Chip revision: 0x");
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report.AppendLine(revision.ToString("X",
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CultureInfo.InvariantCulture));
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report.Append("Error: Invalid address 0x");
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report.AppendLine(address.ToString("X",
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CultureInfo.InvariantCulture));
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report.AppendLine();
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return false;
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}
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switch (chip) {
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case Chip.W83627DHG:
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case Chip.W83627DHGP:
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case Chip.W83627EHF:
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case Chip.W83627HF:
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case Chip.W83627THF:
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case Chip.W83667HG:
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case Chip.W83667HGB:
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case Chip.W83687THF:
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superIOs.Add(new W836XX(chip, revision, address));
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break;
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case Chip.NCT610X:
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case Chip.NCT6771F:
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case Chip.NCT6776F:
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case Chip.NCT6779D:
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case Chip.NCT6791D:
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case Chip.NCT6792D:
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case Chip.NCT6792DA:
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case Chip.NCT6793D:
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case Chip.NCT6795D:
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case Chip.NCT6796D:
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case Chip.NCT6796DR:
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case Chip.NCT6797D:
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case Chip.NCT6798D:
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superIOs.Add(new NCT677X(chip, revision, address, port));
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break;
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case Chip.F71858:
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case Chip.F71862:
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case Chip.F71869:
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case Chip.F71878AD:
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case Chip.F71869A:
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case Chip.F71882:
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case Chip.F71889AD:
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case Chip.F71889ED:
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case Chip.F71889F:
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case Chip.F71808E:
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if (vendorID != FINTEK_VENDOR_ID) {
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report.Append("Chip ID: 0x");
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report.AppendLine(chip.ToString("X"));
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report.Append("Chip revision: 0x");
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report.AppendLine(revision.ToString("X",
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CultureInfo.InvariantCulture));
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report.Append("Error: Invalid vendor ID 0x");
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report.AppendLine(vendorID.ToString("X",
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CultureInfo.InvariantCulture));
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report.AppendLine();
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return false;
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}
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superIOs.Add(new F718XX(chip, address));
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break;
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default: break;
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}
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return true;
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}
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return false;
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}
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#endregion
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#region ITE
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private const byte IT87_ENVIRONMENT_CONTROLLER_LDN = 0x04;
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private const byte IT8705_GPIO_LDN = 0x05;
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private const byte IT87XX_GPIO_LDN = 0x07;
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private const byte IT87_CHIP_VERSION_REGISTER = 0x22;
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private bool DetectIT87(LPCPort port) {
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// IT87XX can enter only on port 0x2E and 0x4E
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if (port.RegisterPort != 0x2E && port.RegisterPort != 0x4E)
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return false;
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port.IT87Enter();
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ushort chipID = port.ReadWord(CHIP_ID_REGISTER);
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Chip chip;
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switch (chipID) {
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case 0x8620: chip = Chip.IT8620E; break;
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case 0x8628: chip = Chip.IT8628E; break;
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case 0x8655: chip = Chip.IT8655E; break;
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case 0x8665: chip = Chip.IT8665E; break;
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case 0x8686: chip = Chip.IT8686E; break;
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case 0x8688: chip = Chip.IT8688E; break;
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case 0x8705: chip = Chip.IT8705F; break;
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case 0x8712: chip = Chip.IT8712F; break;
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case 0x8716: chip = Chip.IT8716F; break;
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case 0x8718: chip = Chip.IT8718F; break;
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case 0x8720: chip = Chip.IT8720F; break;
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case 0x8721: chip = Chip.IT8721F; break;
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case 0x8726: chip = Chip.IT8726F; break;
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case 0x8728: chip = Chip.IT8728F; break;
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case 0x8733: chip = Chip.IT879XE; break;
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case 0x8771: chip = Chip.IT8771E; break;
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case 0x8772: chip = Chip.IT8772E; break;
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default: chip = Chip.Unknown; break;
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}
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if (chip == Chip.Unknown) {
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if (chipID != 0 && chipID != 0xffff) {
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port.IT87Exit();
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ReportUnknownChip(port, "ITE", chipID);
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}
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} else {
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port.Select(IT87_ENVIRONMENT_CONTROLLER_LDN);
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ushort address = port.ReadWord(BASE_ADDRESS_REGISTER);
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Thread.Sleep(1);
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ushort verify = port.ReadWord(BASE_ADDRESS_REGISTER);
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byte version = (byte)(port.ReadByte(IT87_CHIP_VERSION_REGISTER) & 0x0F);
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ushort gpioAddress;
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ushort gpioVerify;
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if (chip == Chip.IT8705F) {
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port.Select(IT8705_GPIO_LDN);
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gpioAddress = port.ReadWord(BASE_ADDRESS_REGISTER);
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Thread.Sleep(1);
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gpioVerify = port.ReadWord(BASE_ADDRESS_REGISTER);
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} else {
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port.Select(IT87XX_GPIO_LDN);
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gpioAddress = port.ReadWord(BASE_ADDRESS_REGISTER + 2);
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Thread.Sleep(1);
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gpioVerify = port.ReadWord(BASE_ADDRESS_REGISTER + 2);
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}
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port.IT87Exit();
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if (address != verify || address < 0x100 || (address & 0xF007) != 0) {
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report.Append("Chip ID: 0x");
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report.AppendLine(chip.ToString("X"));
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report.Append("Error: Invalid address 0x");
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report.AppendLine(address.ToString("X",
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CultureInfo.InvariantCulture));
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report.AppendLine();
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return false;
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}
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if (gpioAddress != gpioVerify || gpioAddress < 0x100 ||
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(gpioAddress & 0xF007) != 0) {
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report.Append("Chip ID: 0x");
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report.AppendLine(chip.ToString("X"));
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report.Append("Error: Invalid GPIO address 0x");
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report.AppendLine(gpioAddress.ToString("X",
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CultureInfo.InvariantCulture));
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report.AppendLine();
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return false;
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}
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superIOs.Add(new IT87XX(chip, address, gpioAddress, version));
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return true;
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}
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return false;
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}
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#endregion
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#region SMSC
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private bool DetectSMSC(LPCPort port) {
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port.SMSCEnter();
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ushort chipID = port.ReadWord(CHIP_ID_REGISTER);
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Chip chip;
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switch (chipID) {
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default: chip = Chip.Unknown; break;
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}
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if (chip == Chip.Unknown) {
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if (chipID != 0 && chipID != 0xffff) {
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port.SMSCExit();
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ReportUnknownChip(port, "SMSC", chipID);
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}
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} else {
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port.SMSCExit();
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
#endregion
|
|
|
|
private void Detect() {
|
|
|
|
for (int i = 0; i < REGISTER_PORTS.Length; i++) {
|
|
var port = new LPCPort(REGISTER_PORTS[i], VALUE_PORTS[i]);
|
|
|
|
if (DetectWinbondFintek(port)) continue;
|
|
|
|
if (DetectIT87(port)) continue;
|
|
|
|
if (DetectSMSC(port)) continue;
|
|
}
|
|
}
|
|
|
|
public LPCIO() {
|
|
if (!Ring0.IsOpen)
|
|
return;
|
|
|
|
if (!Ring0.WaitIsaBusMutex(100))
|
|
return;
|
|
|
|
Detect();
|
|
|
|
Ring0.ReleaseIsaBusMutex();
|
|
}
|
|
|
|
public ISuperIO[] SuperIO {
|
|
get {
|
|
return superIOs.ToArray();
|
|
}
|
|
}
|
|
|
|
public string GetReport() {
|
|
if (report.Length > 0) {
|
|
return "LPCIO" + Environment.NewLine + Environment.NewLine + report;
|
|
} else
|
|
return null;
|
|
}
|
|
}
|
|
}
|