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dpif-netdev-avx512: Fix ubsan shift error in bitmasks.
The code changes here are to handle (1 << i) shifts where 'i' is the packet index in the batch, and 1 << 31 is an overflow of the signed '1'. Fixed by adding UINT32_C() around the 1 character, ensuring compiler knows the 1 is unsigned (and 32-bits). Undefined Behaviour sanitizer is now happy with the bit-shifts at runtime. Suggested-by: Ilya Maximets <i.maximets@ovn.org> Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com> Acked-by: Eelco Chaudron <echaudro@redhat.com> Signed-off-by: Ilya Maximets <i.maximets@ovn.org>
This commit is contained in:
committed by
Ilya Maximets
parent
4e3966e64b
commit
5db8aa39d9
@@ -159,7 +159,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd,
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mf_mask = mfex_func(packets, keys, batch_size, in_port, pmd);
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}
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uint32_t lookup_pkts_bitmask = (1ULL << batch_size) - 1;
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uint32_t lookup_pkts_bitmask = (UINT32_C(1) << batch_size) - 1;
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uint32_t iter = lookup_pkts_bitmask;
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while (iter) {
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uint32_t i = raw_ctz(iter);
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@@ -183,7 +183,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd,
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* classifed by vector mfex else do a scalar miniflow extract
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* for that packet.
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*/
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bool mfex_hit = !!(mf_mask & (1 << i));
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bool mfex_hit = !!(mf_mask & (UINT32_C(1) << i));
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/* Check for a partial hardware offload match. */
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if (hwol_enabled) {
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@@ -204,7 +204,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd,
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pkt_meta[i].bytes = dp_packet_size(packet);
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phwol_hits++;
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hwol_emc_smc_hitmask |= (1 << i);
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hwol_emc_smc_hitmask |= (UINT32_C(1) << i);
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continue;
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}
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}
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@@ -227,7 +227,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd,
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if (f) {
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rules[i] = &f->cr;
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emc_hits++;
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hwol_emc_smc_hitmask |= (1 << i);
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hwol_emc_smc_hitmask |= (UINT32_C(1) << i);
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continue;
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}
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}
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@@ -237,7 +237,7 @@ dp_netdev_input_outer_avx512(struct dp_netdev_pmd_thread *pmd,
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if (f) {
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rules[i] = &f->cr;
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smc_hits++;
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smc_hitmask |= (1 << i);
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smc_hitmask |= (UINT32_C(1) << i);
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continue;
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}
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}
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