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[master] fix isc_atomic_xadd() on MIPS
4414. [bug] Corrected a bug in the MIPS implementation of isc_atomic_xadd(). [RT #41965] Submitted by Lamont Jones (lamont@debian.org). Closes Debian issue #406409.
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@ -1,3 +1,6 @@
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4414. [bug] Corrected a bug in the MIPS implementation of
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isc_atomic_xadd(). [RT #41965]
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4413. [bug] GSSAPI negotiation could fail if GSS_S_CONTINUE_NEEDED
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4413. [bug] GSSAPI negotiation could fail if GSS_S_CONTINUE_NEEDED
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was returned. [RT #42733]
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was returned. [RT #42733]
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@ -23,18 +23,20 @@ static inline isc_int32_t
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isc_atomic_xadd(isc_int32_t *p, int val) {
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isc_atomic_xadd(isc_int32_t *p, int val) {
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isc_int32_t orig;
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isc_int32_t orig;
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/* add is a cheat, since MIPS has no mov instruction */
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__asm__ __volatile__ (
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__asm__ volatile (
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" .set push \n"
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"1:"
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" .set mips2 \n"
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"ll $3, %1\n"
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" .set noreorder \n"
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"add %0, $0, $3\n"
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" .set noat \n"
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"add $3, $3, %2\n"
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"1: ll $1, %1 \n"
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"sc $3, %1\n"
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" addu %0, $1, %2 \n"
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"beq $3, 0, 1b"
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" sc %0, %1 \n"
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: "=&r"(orig)
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" beqz %0, 1b \n"
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: "m"(*p), "r"(val)
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" move %0, $1 \n"
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: "memory", "$3"
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" .set pop \n"
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);
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: "=&r" (orig), "+R" (*p)
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: "r" (val)
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: "memory");
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return (orig);
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return (orig);
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}
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}
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@ -44,16 +46,7 @@ isc_atomic_xadd(isc_int32_t *p, int val) {
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*/
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*/
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static inline void
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static inline void
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isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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__asm__ volatile (
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*p = val;
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"1:"
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"ll $3, %0\n"
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"add $3, $0, %1\n"
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"sc $3, %0\n"
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"beq $3, 0, 1b"
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:
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: "m"(*p), "r"(val)
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: "memory", "$3"
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);
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}
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}
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/*
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/*
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@ -64,20 +57,23 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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static inline isc_int32_t
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static inline isc_int32_t
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isc_atomic_cmpxchg(isc_int32_t *p, int cmpval, int val) {
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isc_atomic_cmpxchg(isc_int32_t *p, int cmpval, int val) {
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isc_int32_t orig;
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isc_int32_t orig;
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isc_int32_t tmp;
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__asm__ volatile(
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__asm__ __volatile__ (
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"1:"
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" .set push \n"
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"ll $3, %1\n"
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" .set mips2 \n"
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"add %0, $0, $3\n"
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" .set noreorder \n"
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"bne $3, %2, 2f\n"
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" .set noat \n"
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"add $3, $0, %3\n"
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"1: ll $1, %1 \n"
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"sc $3, %1\n"
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" bne $1, %3, 2f \n"
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"beq $3, 0, 1b\n"
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" move %2, %4 \n"
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"2:"
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" sc %2, %1 \n"
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: "=&r"(orig)
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" beqz %2, 1b \n"
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: "m"(*p), "r"(cmpval), "r"(val)
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"2: move %0, $1 \n"
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: "memory", "$3"
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" .set pop \n"
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);
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: "=&r"(orig), "+R" (*p), "=r" (tmp)
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: "r"(cmpval), "r"(val)
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: "memory");
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return (orig);
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return (orig);
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}
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}
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