mirror of
https://gitlab.isc.org/isc-projects/bind9
synced 2025-08-30 14:07:59 +00:00
provided __asm version of assembly code for atomic atomic operations
for better compatibility. (this is a temporary resolution so that this one won't block other tests. we'll revisit this change when we figure out performance implication of the __asm version.)
This commit is contained in:
61
configure.in
61
configure.in
@@ -18,7 +18,7 @@ AC_DIVERT_PUSH(1)dnl
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esyscmd([sed "s/^/# /" COPYRIGHT])dnl
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AC_DIVERT_POP()dnl
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AC_REVISION($Revision: 1.378 $)
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AC_REVISION($Revision: 1.379 $)
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AC_INIT(lib/dns/name.c)
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AC_PREREQ(2.13)
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@@ -1867,7 +1867,6 @@ if test "$use_atomic" = "yes"; then
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AC_MSG_CHECKING([architecture type for atomic operations])
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case "$host" in
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[i[3456]86-*]|x86_64-*)
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# XXX: also need to check portability of the "asm" keyword?
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# XXX: some old x86 architectures actualy do not support
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# (some of) these operations. Do we need stricter checks?
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# Note: We currently use the same code for both the x86_32 and
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@@ -1879,15 +1878,6 @@ if test "$use_atomic" = "yes"; then
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alpha*-*)
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have_atomic=yes
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arch=alpha
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if test "X$GCC" != "Xyes"; then
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case "$host" in
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*-dec-osf*)
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# Tru64 compiler has its own syntax for inline
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# assembly.
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ISC_PLATFORM_USEOSFASM="#define ISC_PLATFORM_USEOSFASM 1"
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;;
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esac
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fi
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;;
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*)
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have_atomic=no
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@@ -1897,6 +1887,52 @@ if test "$use_atomic" = "yes"; then
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AC_MSG_RESULT($arch)
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fi
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if test "$have_atomic" = "yes"; then
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AC_MSG_CHECKING([compiler support for inline assembly code])
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compiler=generic
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# Check whehter the compiler supports the assembly syntax we provide.
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if test "X$GCC" = "Xyes"; then
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# GCC's ASM extension always works
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compiler=gcc
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else
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case "$host" in
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alpha*-dec-osf*)
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# Tru64 compiler has its own syntax for inline
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# assembly.
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AC_TRY_COMPILE(, [
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#ifndef __DECC
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#error "unexpected compiler"
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#endif
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return (0);],
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[compiler=osf],)
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;;
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esac
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fi
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case "$compiler" in
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gcc)
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ISC_PLATFORM_USEGCCASM="#define ISC_PLATFORM_USEGCCASM 1"
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;;
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osf)
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ISC_PLATFORM_USEOSFASM="#define ISC_PLATFORM_USEOSFASM 1"
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;;
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*)
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# See if the generic __asm function works. If not,
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# we need to disable the atomic operations.
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AC_TRY_LINK(, [
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__asm("nop")
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],
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[compiler="standard"
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ISC_PLATFORM_USESTDASM="#define ISC_PLATFORM_USESTDASM 1"],
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[compiler="not supported (atomic operations disabled)"
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have_atomic=no
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arch=noatomic ]);
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;;
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esac
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AC_MSG_RESULT($compiler)
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fi
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if test "$have_atomic" = "yes"; then
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ISC_PLATFORM_HAVEXADD="#define ISC_PLATFORM_HAVEXADD 1"
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ISC_PLATFORM_HAVECMPXCHG="#define ISC_PLATFORM_HAVECMPXCHG 1"
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@@ -1910,7 +1946,10 @@ fi
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AC_SUBST(ISC_PLATFORM_HAVEXADD)
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AC_SUBST(ISC_PLATFORM_HAVECMPXCHG)
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AC_SUBST(ISC_PLATFORM_HAVEATOMICSTORE)
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AC_SUBST(ISC_PLATFORM_USEGCCASM)
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AC_SUBST(ISC_PLATFORM_USEOSFASM)
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AC_SUBST(ISC_PLATFORM_USESTDASM)
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ISC_ARCH_DIR=$arch
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AC_SUBST(ISC_ARCH_DIR)
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@@ -14,7 +14,7 @@
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: atomic.h,v 1.2 2005/06/04 05:32:48 jinmei Exp $ */
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/* $Id: atomic.h,v 1.3 2005/06/16 21:57:59 jinmei Exp $ */
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/*
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* This code was written based on FreeBSD's kernel source whose copyright
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@@ -107,7 +107,7 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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"2:",
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p, cmpval, val));
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}
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#else /* ISC_PLATFORM_USEOSFASM */
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#elif defined (ISC_PLATFORM_USEGCCASM)
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static inline isc_int32_t
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isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
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isc_int32_t temp, prev;
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@@ -161,6 +161,10 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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return (prev);
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}
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#endif /* ISC_PLATFORM_USEOSFASM */
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#else
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#error "unsupported compiler. disable atomic ops by --disable-atomic"
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#endif
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#endif /* ISC_ATOMIC_H */
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@@ -15,7 +15,7 @@
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: platform.h.in,v 1.38 2005/06/04 05:32:48 jinmei Exp $ */
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/* $Id: platform.h.in,v 1.39 2005/06/16 21:57:59 jinmei Exp $ */
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#ifndef ISC_PLATFORM_H
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#define ISC_PLATFORM_H 1
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@@ -235,11 +235,21 @@
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*/
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@ISC_PLATFORM_HAVECMPXCHG@
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/*
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* Define if gcc ASM extension is available
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*/
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@ISC_PLATFORM_USEGCCASM@
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/*
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* Define if Tru64 style ASM syntax must be used.
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*/
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@ISC_PLATFORM_USEOSFASM@
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/*
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* Define if the standard __asm function must be used.
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*/
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@ISC_PLATFORM_USESTDASM@
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#ifndef ISC_PLATFORM_USEDECLSPEC
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#define LIBISC_EXTERNAL_DATA
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#define LIBDNS_EXTERNAL_DATA
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@@ -14,7 +14,7 @@
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: atomic.h,v 1.2 2005/06/04 05:32:49 jinmei Exp $ */
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/* $Id: atomic.h,v 1.3 2005/06/16 21:58:00 jinmei Exp $ */
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/*
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* This code was written based on FreeBSD's kernel source whose copyright
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@@ -59,6 +59,8 @@
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#define ASI_P 0x80 /* Primary Address Space Identifier */
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#ifdef ISC_PLATFORM_USEGCCASM
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/*
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* This routine atomically increments the value stored in 'p' by 'val', and
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* returns the previous value.
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@@ -116,4 +118,10 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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return (temp);
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}
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#else /* ISC_PLATFORM_USEGCCASM */
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#error "unsupported compiler. disable atomic ops by --disable-atomic"
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#endif /* ISC_PLATFORM_USEGCCASM */
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#endif /* ISC_ATOMIC_H */
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@@ -14,7 +14,7 @@
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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/* $Id: atomic.h,v 1.2 2005/06/04 05:32:50 jinmei Exp $ */
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/* $Id: atomic.h,v 1.3 2005/06/16 21:58:00 jinmei Exp $ */
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#ifndef ISC_ATOMIC_H
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#define ISC_ATOMIC_H 1
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@@ -22,6 +22,7 @@
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#include <isc/platform.h>
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#include <isc/types.h>
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#ifdef ISC_PLATFORM_USEGCCASM
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/*
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* This routine atomically increments the value stored in 'p' by 'val', and
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* returns the previous value.
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@@ -55,6 +56,7 @@ isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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*/
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"lock;"
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#endif
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"xchgl %1, %0"
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:
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: "r"(val), "m"(*p)
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@@ -80,4 +82,79 @@ isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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return (cmpval);
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}
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#elif defined(ISC_PLATFORM_USESTDASM)
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/*
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* The followings are "generic" assembly code which implements the same
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* functionality in case the gcc extension cannot be used. It should be
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* better to avoid inlining below, since we directly refer to specific
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* positions of the stack frame, which would not actually point to the
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* intended address in the embedded mnemonic.
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*
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* XXX: this code may also not work on a 64-bit (w/o gcc) machine.
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*/
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#include <isc/util.h> /* for 'UNUSED' macro */
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static isc_int32_t
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isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
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UNUSED(p);
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UNUSED(val);
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__asm (
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"movl 8(%ebp), %ecx\n"
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"movl 12(%ebp), %edx\n"
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#ifdef ISC_PLATFORM_USETHREADS
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"lock;"
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#endif
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"xadd %edx, (%ecx)\n"
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/*
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* set the return value directly in the register so that we
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* can avoid guessing the correct position in the stack for a
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* local variable.
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*/
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"movl %edx, %eax"
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);
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}
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static void
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isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
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UNUSED(p);
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UNUSED(val);
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__asm (
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"movl 8(%ebp), %ecx\n"
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"movl 12(%ebp), %edx\n"
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#ifdef ISC_PLATFORM_USETHREADS
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"lock;"
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#endif
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"xchgl (%ecx), %edx\n"
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);
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}
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static isc_int32_t
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isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
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UNUSED(p);
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UNUSED(cmpval);
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UNUSED(val);
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__asm (
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"movl 8(%ebp), %ecx\n"
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"movl 12(%ebp), %eax\n" /* must be %eax for cmpxchgl */
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"movl 16(%ebp), %edx\n"
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#ifdef ISC_PLATFORM_USETHREADS
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"lock;"
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#endif
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/*
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* If (%ecx) == %eax then (%ecx) := %edx.
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% %eax is set to old (%ecx), which will be the return value.
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*/
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"cmpxchgl %edx, (%ecx)"
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);
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}
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#else /* !ISC_PLATFORM_USEGCCASM && !ISC_PLATFORM_USESTDASM */
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#error "unsupported compiler. disable atomic ops by --disable-atomic"
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#endif
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#endif /* ISC_ATOMIC_H */
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