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https://github.com/checkpoint-restore/criu
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compel/x86: Separate functions used to get fpu state
Mere cleanup. For Skylake workaround I'll call one after another, so it's better separate it in a small helpers. Signed-off-by: Dmitry Safonov <dima@arista.com> Signed-off-by: Andrei Vagin <avagin@virtuozzo.com>
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committed by
Andrei Vagin
parent
8a8717da5a
commit
0e609f8cab
@@ -225,12 +225,35 @@ int sigreturn_prep_fpu_frame_plain(struct rt_sigframe *sigframe,
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((user_regs_native(pregs)) ? (int64_t)((pregs)->native.name) : \
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(int32_t)((pregs)->compat.name))
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static int get_task_xsave(pid_t pid, user_fpregs_struct_t *xsave)
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{
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struct iovec iov;
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iov.iov_base = xsave;
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iov.iov_len = sizeof(*xsave);
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if (ptrace(PTRACE_GETREGSET, pid, (unsigned int)NT_X86_XSTATE, &iov) < 0) {
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pr_perror("Can't obtain FPU registers for %d", pid);
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return -1;
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}
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return 0;
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}
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static int get_task_fpregs(pid_t pid, user_fpregs_struct_t *xsave)
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{
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if (ptrace(PTRACE_GETFPREGS, pid, NULL, xsave)) {
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pr_perror("Can't obtain FPU registers for %d", pid);
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return -1;
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}
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return 0;
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}
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int get_task_regs(pid_t pid, user_regs_struct_t *regs, save_regs_t save,
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void *arg, __maybe_unused unsigned long flags)
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{
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user_fpregs_struct_t xsave = { }, *xs = NULL;
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struct iovec iov;
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user_fpregs_struct_t xsave = { }, *xs = NULL;
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int ret = -1;
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pr_info("Dumping general registers for %d in %s mode\n", pid,
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@@ -264,18 +287,11 @@ int get_task_regs(pid_t pid, user_regs_struct_t *regs, save_regs_t save,
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pr_info("Dumping GP/FPU registers for %d\n", pid);
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if (compel_cpu_has_feature(X86_FEATURE_OSXSAVE)) {
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iov.iov_base = &xsave;
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iov.iov_len = sizeof(xsave);
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if (ptrace(PTRACE_GETREGSET, pid, (unsigned int)NT_X86_XSTATE, &iov) < 0) {
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pr_perror("Can't obtain FPU registers for %d", pid);
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if (get_task_xsave(pid, &xsave))
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goto err;
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}
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} else {
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if (ptrace(PTRACE_GETFPREGS, pid, NULL, &xsave)) {
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pr_perror("Can't obtain FPU registers for %d", pid);
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if (get_task_fpregs(pid, &xsave))
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goto err;
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}
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}
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xs = &xsave;
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