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Added support for Intel CPUs with Comet Lake (06_A6H) microarchitecture.

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This commit is contained in:
Michael Möller 2020-03-01 21:42:09 +01:00
parent 9b4a36942f
commit ced93443b7
1 changed files with 8 additions and 0 deletions
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8
Hardware/CPU/IntelCPU.cs
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@ -33,6 +33,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
GoldmontPlus,
CannonLake,
IceLake,
CometLake,
Tremont,
TigerLake
}
@ -209,6 +210,10 @@ namespace OpenHardwareMonitor.Hardware.CPU {
microarchitecture = Microarchitecture.IceLake;
tjMax = GetTjMaxFromMSR();
break;
case 0xA6: // Intel Core i3, i5, i7 10xxxU (14nm)
microarchitecture = Microarchitecture.CometLake;
tjMax = GetTjMaxFromMSR();
break;
case 0x86: // Intel Atom processors
microarchitecture = Microarchitecture.Tremont;
tjMax = GetTjMaxFromMSR();
@ -271,6 +276,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
case Microarchitecture.GoldmontPlus:
case Microarchitecture.CannonLake:
case Microarchitecture.IceLake:
case Microarchitecture.CometLake:
case Microarchitecture.Tremont:
case Microarchitecture.TigerLake: {
uint eax, edx;
@ -341,6 +347,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
microarchitecture == Microarchitecture.GoldmontPlus ||
microarchitecture == Microarchitecture.CannonLake ||
microarchitecture == Microarchitecture.IceLake ||
microarchitecture == Microarchitecture.CometLake ||
microarchitecture == Microarchitecture.Tremont ||
microarchitecture == Microarchitecture.TigerLake)
{
@ -465,6 +472,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
case Microarchitecture.GoldmontPlus:
case Microarchitecture.CannonLake:
case Microarchitecture.IceLake:
case Microarchitecture.CometLake:
case Microarchitecture.Tremont:
case Microarchitecture.TigerLake: {
uint multiplier = (eax >> 8) & 0xff;