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https://github.com/openhardwaremonitor/openhardwaremonitor
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Added support for Intel CPUs with Comet Lake (06_A6H) microarchitecture.
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@ -33,6 +33,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
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GoldmontPlus,
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GoldmontPlus,
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CannonLake,
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CannonLake,
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IceLake,
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IceLake,
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CometLake,
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Tremont,
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Tremont,
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TigerLake
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TigerLake
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}
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}
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@ -209,6 +210,10 @@ namespace OpenHardwareMonitor.Hardware.CPU {
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microarchitecture = Microarchitecture.IceLake;
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microarchitecture = Microarchitecture.IceLake;
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tjMax = GetTjMaxFromMSR();
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tjMax = GetTjMaxFromMSR();
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break;
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break;
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case 0xA6: // Intel Core i3, i5, i7 10xxxU (14nm)
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microarchitecture = Microarchitecture.CometLake;
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tjMax = GetTjMaxFromMSR();
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break;
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case 0x86: // Intel Atom processors
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case 0x86: // Intel Atom processors
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microarchitecture = Microarchitecture.Tremont;
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microarchitecture = Microarchitecture.Tremont;
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tjMax = GetTjMaxFromMSR();
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tjMax = GetTjMaxFromMSR();
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@ -271,6 +276,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
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case Microarchitecture.GoldmontPlus:
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case Microarchitecture.GoldmontPlus:
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case Microarchitecture.CannonLake:
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case Microarchitecture.CannonLake:
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case Microarchitecture.IceLake:
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case Microarchitecture.IceLake:
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case Microarchitecture.CometLake:
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case Microarchitecture.Tremont:
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case Microarchitecture.Tremont:
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case Microarchitecture.TigerLake: {
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case Microarchitecture.TigerLake: {
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uint eax, edx;
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uint eax, edx;
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@ -341,6 +347,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
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microarchitecture == Microarchitecture.GoldmontPlus ||
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microarchitecture == Microarchitecture.GoldmontPlus ||
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microarchitecture == Microarchitecture.CannonLake ||
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microarchitecture == Microarchitecture.CannonLake ||
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microarchitecture == Microarchitecture.IceLake ||
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microarchitecture == Microarchitecture.IceLake ||
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microarchitecture == Microarchitecture.CometLake ||
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microarchitecture == Microarchitecture.Tremont ||
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microarchitecture == Microarchitecture.Tremont ||
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microarchitecture == Microarchitecture.TigerLake)
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microarchitecture == Microarchitecture.TigerLake)
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{
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{
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@ -465,6 +472,7 @@ namespace OpenHardwareMonitor.Hardware.CPU {
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case Microarchitecture.GoldmontPlus:
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case Microarchitecture.GoldmontPlus:
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case Microarchitecture.CannonLake:
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case Microarchitecture.CannonLake:
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case Microarchitecture.IceLake:
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case Microarchitecture.IceLake:
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case Microarchitecture.CometLake:
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case Microarchitecture.Tremont:
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case Microarchitecture.Tremont:
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case Microarchitecture.TigerLake: {
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case Microarchitecture.TigerLake: {
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uint multiplier = (eax >> 8) & 0xff;
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uint multiplier = (eax >> 8) & 0xff;
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