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mirror of https://github.com/Dr-Noob/cpufetch synced 2025-08-30 13:57:56 +00:00
Commit Graph

84 Commits

Author SHA1 Message Date
Dr-Noob
500ccfa871 Stable version 0.7 heavily tested in many different CPUs 2020-09-01 20:44:48 +02:00
Dr-Noob
877833db0a Dont fetch if smt is enabled if its not supported (AMD). Dont guess cache topology, fetch it from CPUID (AMD) 2020-09-01 13:08:44 +02:00
Dr-Noob
5cca6df218 Fix memory leaks. Add debug message when microarch is unknown 2020-09-01 11:32:08 +02:00
Dr-Noob
de8952b4ea Fix bug which caused you couldnt use --version. Change --style to be more user friendly. Update --help 2020-09-01 11:00:11 +02:00
Dr-Noob
1f80566f63 New info to be displayed (uarch and process) instead of other info (sha, aes, sse) 2020-09-01 09:37:53 +02:00
Dr-Noob
ab1416563c Fix PP in Ice Lake 2020-08-31 18:27:32 +02:00
Dr-Noob
1a9c0546f2 Add support for detecting AMD microarch 2020-08-31 15:56:21 +02:00
Dr-Noob
35efdd8f2c Fix #26. Guess number of VPUs according to microarchitecture 2020-08-31 14:04:41 +02:00
Dr-Noob
5148962fa3 Add code to detect CPU microarchitecture (Intel only, at the moment) 2020-08-31 13:18:25 +02:00
Dr-Noob
d998acdcdf Fix #25: Compute PP taking into account the number of sockets 2020-08-31 09:33:39 +02:00
Dr-Noob
81a45628f0 Code refactoring. Forgot to add verbose option to help 2020-08-30 13:55:37 +02:00
Dr-Noob
4f98a5bccf Refactor previous commit 2020-08-30 12:42:38 +02:00
Dr-Noob
dae0f678ad Fix #23. I tried fetching the cache topology in AMD but could not find a proper way, so the code fallback to two commits ago. cpufetch has to guess cache sizes except L3, which can be fetched. Since I have been trying many approaches and stuff, the code needs to be refactored 2020-08-30 12:12:25 +02:00
Dr-Noob
69cc08759a Fix #21 and #22: Obtain the number of caches of every level instead of guessing them. It is done by fetching cache topology from apic. It works, but it needs a big refactoring. Moreover, it currently works only on Intel CPUs, so this breaks the cache in AMD. 2020-08-29 21:51:14 +02:00
Dr-Noob
d8dad29a57 Fix SMT bug in AMD. I would like to improve it, since Intel can use APIC with 0x1 and 0xB (extended) while AMD does with 0x1 and extended seems to be 0x1E. Add support to detect more than one L3 cache. This is not a very elegant solution, since we still assume that we have the same number of caches as caches in a given level. To fix it, cpufetch should know how many caches are in a given level (hint, Linux knows using shared_cpu_map) 2020-08-29 15:42:56 +02:00
Dr-Noob
e08b60b1c8 Project stopped until I have time to continue 2020-07-12 19:08:38 +02:00
Dr-Noob
ad6c3c88ce Small corrections in code and Makefile v0.6 2020-07-12 15:39:34 +02:00
Dr-Noob
e114bde128 Complete topology read in AMD 2020-07-06 01:58:48 +02:00
Dr-Noob
7164409ca2 Add legacy style (for Windows) and make it the default for Windows. Add verbose flag 2020-07-06 01:30:14 +02:00
Dr-Noob
08f79bb914 Fix compilation in Windows and add support for bind to specific cores. Separate APIC code in other file 2020-07-06 01:16:59 +02:00
Dr-Noob
b457c86100 Add support for obtaining topology in old processors (with CPUID less than 0xB) 2020-07-05 19:59:55 +02:00
Dr-Noob
e5d86289b5 Use APIC to obtain topology. This is interesting because this will allow us to obtain it even on older CPUs (without CPUID 0xB) (will be added in future commits) 2020-07-05 16:52:41 +02:00
Dr-Noob
c6c4d8b6fd Fix spaces bug in CPU name 2020-07-03 19:42:05 +02:00
Dr-Noob
c8fde107dd Fix ascii logo in AMD. Fix output on CPUs without L3 2020-07-03 16:24:14 +02:00
Dr-Noob
b076189b32 Add support to detect if HT/SMT is enabled or disabled 2020-07-03 16:11:09 +02:00
Dr-Noob
d43229359a Support for 4 colors with --color (2 for ascii, 2 for text) 2020-07-03 09:42:30 +02:00
Dr-Noob
ba047c76e3 Add two different styles. The old one is now called retro, and the new one, which is the default, is called fancy 2020-07-02 18:53:28 +02:00
Dr-Noob
942a86c04f Remove styles and add option to specify custom color output in RGB format 2020-07-02 16:14:37 +02:00
Dr-Noob
ea338a68c8 Forgot to support AMD in printer 2020-06-29 17:32:50 +02:00
Dr-Noob
d7b7e2b62d Support printing dual socket. Fix bug where cache sizes were not displayed correctly (they were truncated) 2020-06-29 17:13:37 +02:00
Dr-Noob
941bf35d03 Big refactoring. Move ascii managment to printer. Mix extended and standart cpuid functions in cpuid file. Old cpuid renamed to cpuid_asm. Store cpu name in cpuInfo struct 2020-06-28 15:51:30 +02:00
Dr-Noob
131d860de6 Print total cache sizes (for L1 and L2, but also for L3 in case we run in dual socket!) 2020-06-28 12:47:03 +02:00
Dr-Noob
92992be225 Support for multi socket systems (only information gathering, not printing) v0.410 2020-06-22 18:04:24 +02:00
Dr-Noob
698274e44c Fix bug and memory leak 2020-06-22 18:00:45 +02:00
Dr-Noob
7fee305e8b Little fixes 2020-06-22 15:30:05 +02:00
Dr-Noob
1ce6b97bec Fix topology in AMD, using extended level to fetch it 2020-06-22 15:04:32 +02:00
Dr-Noob
8211f24f46 Fix cache in AMD, using extended level 2020-06-22 13:50:00 +02:00
Dr-Noob
0725e9d876 Add --levels option 2020-06-22 13:17:00 +02:00
Dr-Noob
a2dab8129c Use standart types instead of int/long in specific files. This fixes a problem in Windows, were PP was not computed correctly. Compiling with C99 v0.47 2020-06-22 12:47:14 +02:00
Dr-Noob
08ce1de122 Add fallback in Linux in case we cant get the freq from cpuid, using udev (welcome back, udev...) 2020-06-22 12:05:04 +02:00
Dr-Noob
10cf53479e Fix small bug in get_str_topology. Fix #15 2020-06-21 15:55:14 +02:00
Dr-Noob
ce4ecd7af4 Fix bug introduced when using stdbool instead of ints 2020-06-21 13:41:14 +02:00
Dr-Noob
1435978b37 Add release and debug targets in Makefile. Improve robustness by checking cache sizes and snprintf returns 2020-06-21 13:37:44 +02:00
Dr-Noob
0087453eda Refactoring in printer 2020-06-21 12:43:51 +02:00
Dr-Noob
0cba7b4348 Add "none" style (useful for non colored terminals). Refactoring in printer 2020-06-21 11:07:35 +02:00
Dr-Noob
a1496278c3 Fix bug: remove spaces between CPU name in certain processors 2020-06-21 01:48:29 +02:00
Dr-Noob
525cf1a76f Get number of cores (Intel only) with cpuid. This removes sysconf dependency. This implementation breaks cpufetch in NUMA environments 2020-06-20 20:54:38 +02:00
Dr-Noob
6ad5f65c34 Improve error checking. Add partial support for verbose output 2020-06-20 19:21:07 +02:00
Dr-Noob
b81d611282 Fetch freq from cpuid, instead of asking Linux (using /proc). This finally removes udev dependency. However, the support of cpuid 0x16 is limited, so this may break cpufetch on some systems 2020-06-20 13:24:50 +02:00
Dr-Noob
04a2fef2a2 Fetch cache info from cpuid, instead of asking Linux (using /proc) 2020-06-20 12:15:59 +02:00